;****************************************
;*     AHC08 Demo Program - AB32        *
;****************************************

		XDEF Entry, main,AtoD_ISR, T_ISR
		
		Include 'derivative.inc' 


VectorStart    EQU  $FFD0
ADC_Channel    EQU  $05
ADC_ENABLE_INT EQU  $40    ; Bit mask for interrupt enable bit
                                ; in the ADC status/control register

DEFEAULT_RAM		SECTION SHORT


temp_long ds 4
temp_word ds 2
temp_byte ds 1
Timeout1 ds 1   ; Allows three timeout routines to be called each of which
Timeout2 ds 1   ; can run for up to ~ 1/2 second.
Timeout3 ds 1


DEFAULT_ROM			SECTION

**************************************************************
* Init_SCI - Turns on the asyncronous communications port    *
*            for "transmitting only" at 9600 baud N81.       *
**************************************************************
Init_SCI:
       mov   #$03,SCBR       ; Baud Rate = 9600
       mov   #$40,SCC1       ; Enable the SCI peripheral
       mov   #$08,SCC2       ; Enable the SCI transmitter
       rts


**************************************************************
* Init_AtoD - Sets up the AtoD clock + turns it on           *
**************************************************************
Init_AtoD:
       mov   #$30,ADCLK          ; Bus Clock / 2
       mov   #ADC_CHANNEL,ADSCR  ; Enable the ADC peripheral
       rts


**************************************************************
* Init_Timer - Turns on timer A channel 0 for an Output      *
*              Compare in approximately 2ms. The timer       *
*              interrupt service routine continually sets    *
*              the next interrupt to occur 2ms later.        *
**************************************************************
Init_Timer:
       mov   #$36,TASC     ; Timer A - Cleared + Stopped.
                           ;    Clicks once every 64 BUS Cycles
                           ;    77t Clicks ~ 2ms

       mov   #$0, TACH0H   ; Set Output Compare to happen 77T clicks
       mov   #4D,TACH0L    ; after we start the timer. (~2ms). The
                           ; timer interrupt will set OC for another ~2ms.

       mov   #$54,TASC0    ; Timer A Channel 0
                           ; Set for Output Compare operation.

       mov   #$06,TASC     ; Start the timer
       rts


**************************************************************
* Main_Init - This is the point where code starts executing  *
*             after a RESET.                                 *
**************************************************************
Entry:
main:
       rsp
       clra                ; Initialize A,X so that interrupt
       clrx                ; processing doesn't stop with
                           ; uninitialized register warning
                           ; when push A,X on the stack
       bsr Init_SCI        ; Initialize peripherals
       bsr Init_AtoD
       bsr Init_Timer
       clr timeout1        ; Initialize timeouts (0=off)
       clr timeout2
       clr timeout3
       cli                 ; Allow interrupts to happen

       mov #$3,timeout1     ; Start an AtoD conversion in 3*2ms=6ms

main_loop:
       sta copctl		   ; service cop control register to prevent reset
       bra main_loop

**************************************************************
* AtoD_ISR - ADC Conversion Complete Interrupt               *
*            Transmit ADC value out serial port (PTE0)       *
*                                                            *
*            Note: VDDAREF and VREFH must have a positive    *
*            voltage, and VREFL must be connected to ground  *
*            for this demo to work properly.                 *
**************************************************************
AtoD_ISR:

       lda  adr            ; Get the converted value
now:   brclr 7,scs1,now    ; wait until xmitter is ready.
       sta  scdr           ; Xmit it our serial port
       sta  temp_byte      ; save it in temp_byte
       rti


**************************************************************
* T_ISR - Timer Interrupt Service Routine.                   *
*             after a RESET.                                 *
**************************************************************
T_ISR:
       pshh
       lda   tasc0
       and   #$7f
       sta   tasc0              ; Clear O.C. Flag
       ldhx  tach0h
       aix   #$4D                ; Setup another interrupt in ~2ms
       sthx  tach0h
       pulh

Check_t1:
       tst timeout1
       beq check_t2             ; Is Timeout 1 currently active?
       dec timeout1             ;   yes
       bne check_t2             ; Did it just finish counting down?
       jsr t1_handler           ;   Yes - Execute Timeout 1 handler

Check_t2:
       tst timeout2
       beq check_t3             ; Is Timeout 2 currently active?
       dec timeout2             ;   yes
       bne check_t3             ; Did it just finish counting down?
       jsr t2_handler           ;   Yes - Execute Timeout 2 handler

Check_t3:
       tst timeout3
       beq done_tisr             ; Is Timeout 3 currently active?
       dec timeout3             ;   yes
       bne done_tisr             ; Did it just finish counting down?
       jsr t3_handler           ;   Yes - Execute Timeout 3 handler

done_tisr:
       rti


****************************************************************
* Timeout Handlers - All the user has to do is set one of the  *
*                    timeout variables to any number n (1-255) *
*                    and the timeout handler will be executed  *
*                    in 2*n milliseconds. Setting the timeout  *
*                    variable from within the handler will     *
*                    cause a periodic timeout as shown in      *
*                    timeout 1.                                *
****************************************************************
t1_handler:
       nop
       mov   #$45,ADSCR
                                 ; Start a single ADC conversion
                                 ; which will generate an interrupt.

       mov   #$3,timeout1         ; Setup next t1_handler event in 3*2ms=6ms
       rts

t2_handler:
       nop
       rts

t3_handler:
       nop
       rts

END


* This source is (C)opyright 2002, P&E Microcomputer Systems, Inc.
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