One of the vexing problems we have had for years was the difficulty of installing  off the shelf capacitor discharge ignition systems on the rotary. The very common 2nd gen crank angle sensor put out only one pulse per engine rev while two were required. One 180 degrees out of phase with the other. One pulse for each rotor.

A four cylinder piston engine puts out four pulses per rev of the 1/2 speed cam shaft and the distributor sends the spark to the right cylinder as needed and one CD system is used. If we could somehow get two pulses 180 degrees out of phase we could use two CD systems with the benefit of multiple sparks at a much higher RPM than would be possible with a 4 cylinder engine and a single CD system.

Yes we could use two trigger wheels on the e-shaft and two sensors mounted 180 degrees out. The spark wheels would have to be slotted so the spark timing could be adjusted.  The 2nd gen CAS has two sensors and it is already slotted for timing adjustments. They are a dime a dozen on e-bay and are the most common way of triggering  rotary engines.

The top sensor puts out one spark per E-shaft rev and the lower sensor puts out 12 sparks per E-shaft rev. The lower sensor is used to send RPM data to the computer. Why does the top sensor have two tits on the trigger wheel? Simple! The CAS runs at half E-shaft speed left over from the days when the rotary had a distributor.

 What I have come up with is a simple and cheap two chip counter circuit that counts six pulses on the lower sensor and puts out one pulse for the second rotor. Ideally I'll sell an assembled PC board unless someone else wants to do it. We don't need variable advance as the engine runs in a narrow RPM range of 5000 to 7500 RPM and real aircraft engines don't have variable advance. If you want variable advance get a computer and program it yourself :)

Here is the timing diagram. The counter chip I will try to use is a CMOS 4017 decade counter. A hex inverter chip will provide both positive and negative going triggers for different CD systems depending on their needs.

http://www.kpsec.freeuk.com/components/cmos.htm#4002
The count advances as the clock input becomes high (on the rising-edge). Each output Q0-Q9 goes high in turn as counting advances. For some functions (such as flash sequences) outputs may be combined using diodes.

The reset input should be low (0V) for normal operation (counting 0-9). When high it resets the count to zero (Q0 high). This can be done by the top trigger  pulse.

The disable input should be low (0V) for normal operation. When high it disables counting so that clock pulses are ignored and the count is kept constant.


Paul Lamar